Adaptation Panel Reader en Bluetooth

/* Microchip Technology Inc. and its subsidiaries.  You may use this software 

 * and any derivatives exclusively with Microchip products. 

 * 

 * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS".  NO WARRANTIES, WHETHER 

 * EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY IMPLIED 

 * WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS FOR A 

 * PARTICULAR PURPOSE, OR ITS INTERACTION WITH MICROCHIP PRODUCTS, COMBINATION 

 * WITH ANY OTHER PRODUCTS, OR USE IN ANY APPLICATION. 

 *

 * IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, 

 * INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND 

 * WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS 

 * BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE.  TO THE 

 * FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS 

 * IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF 

 * ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.

 *

 * MICROCHIP PROVIDES THIS SOFTWARE CONDITIONALLY UPON YOUR ACCEPTANCE OF THESE 

 * TERMS. 

 */

/* 

 * File:   defValues.h

 * Author: Enzo Niro

 * Comments: Defitions values for every default variables/registers/ect...

 * Revision history: 1.0

 */

// This is a guard condition so that contents of this file are not included

// more than once.  

#ifndef APP_DEF_VALUES_H

#define        APP_DEF_VALUES_H

#include <xc.h> // include processor files - each processor file is guarded.  

//General definitions

#define ENABLE_BIT                      1

#define ASCII_NUMBER_CONVERSION         0x30

//USART

#define MAX_BAUD_VALUES                 9

//EEPROM cfg max bytes

#define TOP_CFG_ADDR                    33

//Window serial buffer analyser (add 1 one to get entire frame + temp byte)

#define MAX_WINDOW_BUFFER               15

//ADC definitions

#define ADC_PGA_BIAS                    0x00 //Set PGA BIAS -> We must set CLK_ADC less than 6MHz

#define ADC_PGA_SMD                     0x02  //Set PGA SAMPDUR -> We must set CLK_ADC less than 6MHz

//PGA gains

enum ADCPGAGain

{

    ADC_PGA_1X = 0,

    ADC_PGA_2X,

    ADC_PGA_4X,

    ADC_PGA_8X,

    ADC_PGA_16X,

};

#define ADC_VIA_DIRECT                  0x00 //Analog input linked direct to ADC

#define ADC_VIA_PGA                     0x01 //Analog input linked to PGA

enum ADCMUXPOS

{

    ADC_MUX_DEFAULT = 0,

    ADC_MUX_AIN1,

    ADC_MUX_AIN2,

    ADC_MUX_AIN3,

    ADC_MUX_AIN4,

    ADC_MUX_AIN5,

    ADC_MUX_AIN6,

    ADC_MUX_AIN7,

    ADC_MUX_AIN8,

    ADC_MUX_AIN9,

    ADC_MUX_AIN10,

    ADC_MUX_AIN11,

    ADC_MUX_AIN12,

    ADC_MUX_AIN13,

    ADC_MUX_AIN14,

    ADC_MUX_AIN15,

    ADC_MUX_GND = 30,

    ADC_MUX_VDDDIV10,

    ADC_MUX_TEMPSENSE,

    ADC_MUX_DACREF0,

};

enum ADCMUXNEG

{

    ADC_MUXN_DEFAULT = 0,

    ADC_MUXN_AIN1,

    ADC_MUXN_AIN2,

    ADC_MUXN_AIN3,

    ADC_MUXN_AIN4,

    ADC_MUXN_AIN5,

    ADC_MUXN_AIN6,

    ADC_MUXN_AIN7,

    ADC_MUXN_AIN8,

    ADC_MUXN_AIN9,

    ADC_MUXN_AIN10,

    ADC_MUXN_AIN11,

    ADC_MUXN_AIN12,

    ADC_MUXN_AIN13,

    ADC_MUXN_AIN14,

    ADC_MUXN_AIN15,

    ADC_MUXN_GND = 30,

    ADC_MUXN_VDDDIV10,

    ADC_MUXN_TEMPSENSE,

    ADC_MUXN_DACREF0,

};

//ADC operation mode

#define ADC_SINGLE_8BIT                 0x00

#define ADC_SINGLE_12BIT                0x01

#endif        /* XC_HEADER_TEMPLATE_H */