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1 f0dbe1d9 Enzo Niro
/* Microchip Technology Inc. and its subsidiaries.  You may use this software 
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 * and any derivatives exclusively with Microchip products. 
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 * 
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 * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS".  NO WARRANTIES, WHETHER 
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 * EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY IMPLIED 
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 * WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS FOR A 
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 * PARTICULAR PURPOSE, OR ITS INTERACTION WITH MICROCHIP PRODUCTS, COMBINATION 
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 * WITH ANY OTHER PRODUCTS, OR USE IN ANY APPLICATION. 
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 *
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 * IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, 
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 * INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND 
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 * WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS 
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 * BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE.  TO THE 
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 * FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS 
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 * IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF 
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 * ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
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 *
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 * MICROCHIP PROVIDES THIS SOFTWARE CONDITIONALLY UPON YOUR ACCEPTANCE OF THESE 
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 * TERMS. 
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 */
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/* 
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 * File: hardware_TL16C754C.h  
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 * Author: Enzo Niro
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 * Comments: Library for MUX232 to handle TL16C754C chip
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 * Revision history: 1.0
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 */
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#ifndef RS232_HARDWARETL16_H
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#define        RS232_HARDWARETL16_H
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#include <xc.h> // include processor files - each processor file is guarded. 
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//////////////////////////////////////
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//prototypes functions
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//////////////////////////
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//High level functions
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void initPortA(uint8_t busSpeed, uint8_t dataBits, uint8_t parity, uint8_t stopBit);
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void initPortB(uint8_t busSpeed, uint8_t dataBits, uint8_t parity, uint8_t stopBit);
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void initPortC(uint8_t busSpeed, uint8_t dataBits, uint8_t parity, uint8_t stopBit);
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void initPortD(uint8_t busSpeed, uint8_t dataBits, uint8_t parity, uint8_t stopBit);
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//Send bytes throught serial port
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void txWriteA(uint8_t b);
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void txWriteB(uint8_t b);
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void txWriteC(uint8_t b);
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void txWriteD(uint8_t b);
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//Receive bytes from serial port
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uint8_t rxReadA(void);
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uint8_t rxReadB(void);
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uint8_t rxReadC(void);
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uint8_t rxReadD(void);
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//RX buffer control
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//available functions
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bool portA_available();
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bool portB_available();
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bool portC_available();
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bool portD_available();
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//parity functions
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bool getParitySetA();
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bool getParitySetB();
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bool getParitySetC();
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bool getParitySetD();
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/*
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 TODO : Implement functions...
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 */
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//////////////////////////
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//Low level functions
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void writePortA(uint8_t reg, uint8_t addr);
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void writePortB(uint8_t reg, uint8_t addr);
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void writePortC(uint8_t reg, uint8_t addr);
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void writePortD(uint8_t reg, uint8_t addr);
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uint8_t readPortA(uint8_t addr);
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uint8_t readPortB(uint8_t addr);
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uint8_t readPortC(uint8_t addr);
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uint8_t readPortD(uint8_t addr);
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void setWait(uint16_t cnt); //fast delay
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//////////////////////////////////////////////////////////
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//Values definitions (not supposed to use it directly)
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#define DLAB_ERF_EN_BIT     0x80
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#define LCR_REG             0x3 //Static register
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///////////////////////////////////////////
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// READ Registers
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#define RHR_REG         0x0
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#define IIR_REG         0x2
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#define LSR_REG         0x5
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#define MSR_REG         0x6
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#define FIFORDY_REG     0x7
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///////////////////////////////////////////
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// WRITE Registers
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#define THR_REG     0x0
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#define FCR_REG     0x2
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///////////////////////////////////////////
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// READ/WRITE Registers
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#define IER_REG         0x1
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#define LCR_REG         0x3
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#define MCR_REG         0x4
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#define SPR_REG         0x7
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#define DLL_REG         0x0
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#define DLH_REG         0x1
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#define EFR_REG         0x2
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#define XON1_REG        0x4
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#define XON2_REG        0x5
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#define XOFF1_REG       0x6
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#define XOFF2_REG       0x7
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#define TCR_REG         0x6
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#define TLR_REG         0x7
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///////////////////////////////////////////////////////
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//CTRL, ADDR and DATA buses
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//Data pins
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#define DATAWRITE(x)        PORTD.OUT = x
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#define DATADIR(x)          PORTD.DIR = x
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#define DATAREAD            PORTD.IN
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//Address pins
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#define ADDRWRITE(x)        PORTE.OUT = x
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#define ADDR_ENABLE         PORTE.DIR |= 0x07
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//Controls pins
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#define ENABLE_POW_SUPPLY_PIN   PORTF.DIR |= 0x01
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#define ENABLE_WR_RD_PINS       PORTB.DIR |= 0x30
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#define ENABLE_CS_PINS          PORTB.DIR |= 0x0F
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#define ENABLE_RESET_PIN        PORTE.DIR |= 0x08
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#define POWER_ON                PORTF.OUT |= 0x01
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#define POWER_OFF               PORTF.OUT &= ~(0x01)
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#define SETRST                  PORTE.OUT |= 0x08
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#define SETWR                   PORTB.OUT |= 0x10
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#define SETRD                   PORTB.OUT |= 0x20
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#define SETCSA                  PORTB.OUT |= 0x01
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#define SETCSB                  PORTB.OUT |= 0x02
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#define SETCSC                  PORTB.OUT |= 0x04
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#define SETCSD                  PORTB.OUT |= 0x08
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#define CLRRST                  PORTE.OUT &= ~(0x08)
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#define CLRWR                   PORTB.OUT &= ~(0x10)
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#define CLRRD                   PORTB.OUT &= ~(0x20)
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#define CLRCSA                  PORTB.OUT &= ~(0x01)
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#define CLRCSB                  PORTB.OUT &= ~(0x02)
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#define CLRCSC                  PORTB.OUT &= ~(0x04)
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#define CLRCSD                  PORTB.OUT &= ~(0x08)
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///////////////////////////////////////////////////////////////////////////////
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//Private vars
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bool _portA_parity_set;
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bool _portB_parity_set;
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bool _portC_parity_set;
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bool _portD_parity_set;
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///////////////////////////////////////////////////////////////////////////////
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//Functions
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//////////////////////////////////////
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//High level functions
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void initPortA(uint8_t busSpeed, uint8_t dataBits, uint8_t parity, uint8_t stopBit)
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{
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    uint8_t regVal = 0; //temp value for reading register and change it's value without clearing it
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    _portA_parity_set = (parity > 0); //Parity set (even or odd) ?
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    //Read register first...
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    regVal = readPortA(LCR_REG);
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    //_delay_ms(1);
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    setWait(20);
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    regVal = DLAB_ERF_EN_BIT; //set LCR[7] = 1 -> enable divisor latch mode
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    writePortA(regVal, LCR_REG); //switch Mode
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    //_delay_ms(1);
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    setWait(20);
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    //Set bus speed (according of 8MHz OSC. -> DL = Fosc/(16*Fbauds*DIV)); 
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    //DIV = 1 or 4 (see TL16C datasheet p.14), we use here DIV = 1 
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    writePortA(0x00, DLH_REG); //Always 0x00 in our cfg... MAX 12MHz
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    //_delay_ms(1);
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    setWait(20);
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    //writePortA(busSpeed > 2 ? DL_38400_BAUDS : baudsValues[busSpeed], DLL_REG);
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    writePortA(busSpeed, DLL_REG);
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    //_delay_ms(1);
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    setWait(20);
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    regVal = readPortA(LCR_REG);
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    regVal &= ~(DLAB_ERF_EN_BIT); //set LCR[7] = 0 -> disable divisor latch mode
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    //regVal |= dataBits > 3 ? TL16C_WORD_8BITS : wordValues[dataBits]; //set 8bits mode
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    //regVal |= (stopBit > 1 ? TL16C_STOPBIT_TWO : stopBitValues[stopBit]) << 2; //set stop bits
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    //regVal |= (parity > 2 ? TL16C_PARITY_EVEN : parityValues[parity]) << 3; //set stop bits
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    regVal |= dataBits; //set 8bits mode
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    regVal |= stopBit << 2; //set stop bits
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    regVal |= parity << 3; //set stop bits
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    writePortA(regVal, LCR_REG);
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    //_delay_ms(1);
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    setWait(20);
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    writePortA(0x01, FCR_REG); //enable FIFO
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    setWait(20);
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}
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void initPortB(uint8_t busSpeed, uint8_t dataBits, uint8_t parity, uint8_t stopBit)
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{
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    uint8_t regVal = 0; //temp value for reading register and change it's value without clearing it
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    _portB_parity_set = (parity > 0); //Parity set (even or odd) ?
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    //Read register first...
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    regVal = readPortB(LCR_REG);
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    //_delay_ms(1);
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    setWait(20);
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    regVal = DLAB_ERF_EN_BIT; //set LCR[7] = 1 -> enable divisor latch mode
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    writePortB(regVal, LCR_REG); //switch Mode
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    //_delay_ms(1);
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    setWait(20);
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    //Set bus speed (according of 8MHz OSC. -> DL = Fosc/(16*Fbauds*DIV)); 
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    //DIV = 1 or 4 (see TL16C datasheet p.14), we use here DIV = 1 
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    writePortB(0x00, DLH_REG); //Always 0x00 in our cfg... MAX 12MHz
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    //_delay_ms(1);
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    setWait(20);
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    //writePortA(busSpeed > 2 ? DL_38400_BAUDS : baudsValues[busSpeed], DLL_REG);
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    writePortB(busSpeed, DLL_REG);
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    //_delay_ms(1);
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    setWait(20);
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    regVal = readPortB(LCR_REG);
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    regVal &= ~(DLAB_ERF_EN_BIT); //set LCR[7] = 0 -> disable divisor latch mode
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    //regVal |= dataBits > 3 ? TL16C_WORD_8BITS : wordValues[dataBits]; //set 8bits mode
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    //regVal |= (stopBit > 1 ? TL16C_STOPBIT_TWO : stopBitValues[stopBit]) << 2; //set stop bits
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    //regVal |= (parity > 2 ? TL16C_PARITY_EVEN : parityValues[parity]) << 3; //set stop bits
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    regVal |= dataBits; //set 8bits mode
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    regVal |= stopBit << 2; //set stop bits
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    regVal |= parity << 3; //set stop bits
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    writePortB(regVal, LCR_REG);
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    //_delay_ms(1);
276
    setWait(20);
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    writePortB(0x01, FCR_REG); //enable FIFO
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    setWait(20);
279
}
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void initPortC(uint8_t busSpeed, uint8_t dataBits, uint8_t parity, uint8_t stopBit)
283
{
284
    uint8_t regVal = 0; //temp value for reading register and change it's value without clearing it
285
    
286
    _portC_parity_set = (parity > 0); //Parity set (even or odd) ?
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288
    
289
    //Read register first...
290
    regVal = readPortC(LCR_REG);
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    //_delay_ms(1);
292
    setWait(20);
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    regVal = DLAB_ERF_EN_BIT; //set LCR[7] = 1 -> enable divisor latch mode
294
    writePortC(regVal, LCR_REG); //switch Mode
295
    //_delay_ms(1);
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    setWait(20);
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    //Set bus speed (according of 8MHz OSC. -> DL = Fosc/(16*Fbauds*DIV)); 
298
    //DIV = 1 or 4 (see TL16C datasheet p.14), we use here DIV = 1 
299
    writePortC(0x00, DLH_REG); //Always 0x00 in our cfg... MAX 12MHz
300
    //_delay_ms(1);
301
    setWait(20);
302
    //writePortA(busSpeed > 2 ? DL_38400_BAUDS : baudsValues[busSpeed], DLL_REG);
303
    writePortC(busSpeed, DLL_REG);
304
    //_delay_ms(1);
305
    setWait(20);
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307
    regVal = readPortC(LCR_REG);
308
    regVal &= ~(DLAB_ERF_EN_BIT); //set LCR[7] = 0 -> disable divisor latch mode
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    //regVal |= dataBits > 3 ? TL16C_WORD_8BITS : wordValues[dataBits]; //set 8bits mode
311
    //regVal |= (stopBit > 1 ? TL16C_STOPBIT_TWO : stopBitValues[stopBit]) << 2; //set stop bits
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    //regVal |= (parity > 2 ? TL16C_PARITY_EVEN : parityValues[parity]) << 3; //set stop bits
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    regVal |= dataBits; //set 8bits mode
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    regVal |= stopBit << 2; //set stop bits
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    regVal |= parity << 3; //set stop bits
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    writePortC(regVal, LCR_REG);
317
    //_delay_ms(1);
318
    setWait(20);
319
    writePortC(0x01, FCR_REG); //enable FIFO
320
    setWait(20);
321
}
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void initPortD(uint8_t busSpeed, uint8_t dataBits, uint8_t parity, uint8_t stopBit)
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{
327
    uint8_t regVal = 0; //temp value for reading register and change it's value without clearing it
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    _portD_parity_set = (parity > 0); //Parity set (even or odd) ?
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332
    //Read register first...
333
    regVal = readPortD(LCR_REG);
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    //_delay_ms(1);
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    setWait(20);
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    regVal = DLAB_ERF_EN_BIT; //set LCR[7] = 1 -> enable divisor latch mode
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    writePortD(regVal, LCR_REG); //switch Mode (and clear default cfg...)
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    //_delay_ms(1);
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    setWait(20);
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    //Set bus speed (according of 8MHz OSC. -> DL = Fosc/(16*Fbauds*DIV)); 
341
    //DIV = 1 or 4 (see TL16C datasheet p.14), we use here DIV = 1 
342
    writePortD(0x00, DLH_REG); //Always 0x00 in our cfg... MAX 12MHz
343
    //_delay_ms(1);
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    setWait(20);
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    //writePortA(busSpeed > 2 ? DL_38400_BAUDS : baudsValues[busSpeed], DLL_REG);
346
    writePortD(busSpeed, DLL_REG);
347
    //_delay_ms(1);
348
    setWait(20);
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    regVal = readPortD(LCR_REG);
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    regVal &= ~(DLAB_ERF_EN_BIT); //set LCR[7] = 0 -> disable divisor latch mode
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    //regVal |= dataBits > 3 ? TL16C_WORD_8BITS : wordValues[dataBits]; //set 8bits mode
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    //regVal |= (stopBit > 1 ? TL16C_STOPBIT_TWO : stopBitValues[stopBit]) << 2; //set stop bits
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    //regVal |= (parity > 2 ? TL16C_PARITY_EVEN : parityValues[parity]) << 3; //set stop bits
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    regVal |= dataBits; //set 8bits mode
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    regVal |= stopBit << 2; //set stop bits
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    regVal |= parity << 3; //set stop bits
359
    writePortD(regVal, LCR_REG);
360
    //_delay_ms(1);
361
    setWait(20);
362
    writePortD(0x01, FCR_REG); //enable FIFO
363
    setWait(20);
364
}
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//////////////////////////////////////////////
369
//UART send/reiceive
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void txWriteA(uint8_t b)
372
{
373
    writePortA(b, THR_REG); //write to Transmit Holding (that goes into TX FIFO buffer)
374
}
375
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void txWriteB(uint8_t b)
378
{
379
    writePortB(b, THR_REG); //write to Transmit Holding (that goes into TX FIFO buffer)
380
}
381
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void txWriteC(uint8_t b)
384
{
385
    writePortC(b, THR_REG); //write to Transmit Holding (that goes into TX FIFO buffer)
386
}
387
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void txWriteD(uint8_t b)
390
{
391
    writePortD(b, THR_REG); //write to Transmit Holding (that goes into TX FIFO buffer)
392
}
393
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uint8_t rxReadA(void)
397
{
398
    return readPortA(RHR_REG); //read Receive Holding (from RX FIFO buffer)
399
}
400
401
402
uint8_t rxReadB(void)
403
{
404
    return readPortB(RHR_REG); //read Receive Holding (from RX FIFO buffer)
405
}
406
407
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uint8_t rxReadC(void)
409
{
410
    return readPortC(RHR_REG); //read Receive Holding (from RX FIFO buffer)
411
}
412
413
414
uint8_t rxReadD(void)
415
{
416
    return readPortD(RHR_REG); //read Receive Holding (from RX FIFO buffer)
417
}
418
419
420
////////////////////////////////////////
421
//RX buf state functions
422
423
bool portA_available()
424
{
425
    return (readPortA(LSR_REG) & 0x01); //check if RX FIFO buffer has at least one byte available
426
}
427
428
429
bool portB_available()
430
{
431
    return (readPortB(LSR_REG) & 0x01); //check if RX FIFO buffer has at least one byte available
432
}
433
434
435
bool portC_available()
436
{
437
    return (readPortC(LSR_REG) & 0x01); //check if RX FIFO buffer has at least one byte available
438
}
439
440
441
bool portD_available()
442
{
443
    return (readPortD(LSR_REG) & 0x01); //check if RX FIFO buffer has at least one byte available
444
}
445
446
447
///////////////////////////////////////////////////////////////////////
448
//Parity configuration status
449
450
//get status if port has been configured with a parity into the frame
451
bool getParitySetA()
452
{
453
    return _portA_parity_set;
454
}
455
456
bool getParitySetB()
457
{
458
    return _portB_parity_set;
459
}
460
461
bool getParitySetC()
462
{
463
    return _portC_parity_set;
464
}
465
466
bool getParitySetD()
467
{
468
    return _portD_parity_set;
469
}
470
471
472
473
//Get parity/stopbit error status when frame received on port
474
475
bool getErrorStatusA()
476
{
477
    return ((readPortA(LSR_REG) & 0x80) == 0x80);
478
}
479
480
bool getErrorStatusB()
481
{
482
    return ((readPortB(LSR_REG) & 0x80) == 0x80);
483
}
484
485
bool getErrorStatusC()
486
{
487
    return ((readPortC(LSR_REG) & 0x80) == 0x80);
488
}
489
490
bool getErrorStatusD()
491
{
492
    return ((readPortD(LSR_REG) & 0x80) == 0x80);
493
}
494
495
496
///////////////////////////////////////////////////////
497
//write functions
498
499
500
501
void writePortA(uint8_t reg, uint8_t addr)
502
{
503
    DATADIR(0xFF); //set I/O on write mode
504
    ADDRWRITE(addr); //search uartn register
505
    DATAWRITE(reg); //write data
506
    CLRCSA; //enable uartA call
507
    setWait(3);
508
    CLRWR; //enable write mode
509
    setWait(3);
510
    SETWR; //disable write mode
511
    setWait(3);
512
    SETCSA; //disable uartA call
513
    DATADIR(0x00); //set input mode (to reduce power consumption)
514
}
515
516
void writePortB(uint8_t reg, uint8_t addr)
517
{
518
    DATADIR(0xFF); //set I/O on write mode
519
    ADDRWRITE(addr); //search uartn register
520
    DATAWRITE(reg); //write data
521
    CLRCSB; //enable uartA call
522
    setWait(3);
523
    CLRWR; //enable write mode
524
    setWait(3);
525
    SETWR; //disable write mode
526
    setWait(3);
527
    SETCSB; //disable uartA call
528
    DATADIR(0x00); //set input mode (to reduce power consumption)
529
}
530
531
void writePortC(uint8_t reg, uint8_t addr)
532
{
533
    DATADIR(0xFF); //set I/O on write mode
534
    ADDRWRITE(addr); //search uartn register
535
    DATAWRITE(reg); //write data
536
    CLRCSC; //enable uartA call
537
    setWait(3);
538
    CLRWR; //enable write mode
539
    setWait(3);
540
    SETWR; //disable write mode
541
    setWait(3);
542
    SETCSC; //disable uartA call
543
    DATADIR(0x00); //set input mode (to reduce power consumption)
544
}
545
546
void writePortD(uint8_t reg, uint8_t addr)
547
{
548
    DATADIR(0xFF); //set I/O on write mode
549
    ADDRWRITE(addr); //search uartn register
550
    DATAWRITE(reg); //write data
551
    CLRCSD; //enable uartA call
552
    setWait(3);
553
    CLRWR; //enable write mode
554
    setWait(3);
555
    SETWR; //disable write mode
556
    setWait(3);
557
    SETCSD; //disable uartA call
558
    DATADIR(0x00); //set input mode (to reduce power consumption)
559
}
560
561
562
///////////////////////////////////////////////////////
563
//read functions
564
565
566
uint8_t readPortA(uint8_t addr)
567
{
568
    uint8_t result;
569
    DATADIR(0x00); //set I/O on read mode
570
    ADDRWRITE(addr); //search uartn register
571
    CLRCSA; //enable uartA call
572
    setWait(3);
573
    CLRRD; //enable read mode
574
    setWait(3);
575
    result = PORTD.IN; //set I/O on read mode
576
    setWait(3);
577
    SETRD; //disable read mode
578
    setWait(3);
579
    SETCSA; //hang up uartA call
580
    return result;
581
}
582
583
uint8_t readPortB(uint8_t addr)
584
{
585
    uint8_t result;
586
    DATADIR(0x00); //set I/O on read mode
587
    ADDRWRITE(addr); //search uartn register
588
    CLRCSB; //enable uartB call
589
    setWait(3);
590
    CLRRD; //enable read mode
591
    setWait(3);
592
    result = PORTD.IN; //set I/O on read mode
593
    setWait(3);
594
    SETRD; //disable read mode
595
    setWait(3);
596
    SETCSB; //hang up uartB call
597
    return result;
598
}
599
600
uint8_t readPortC(uint8_t addr)
601
{
602
    uint8_t result;
603
    DATADIR(0x00); //set I/O on read mode
604
    ADDRWRITE(addr); //search uartn register
605
    CLRCSC; //enable uartC call
606
    setWait(3);
607
    CLRRD; //enable read mode
608
    setWait(3);
609
    result = PORTD.IN; //set I/O on read mode
610
    setWait(3);
611
    SETRD; //disable read mode
612
    setWait(3);
613
    SETCSC; //hang up uartC call
614
    return result;
615
}
616
617
uint8_t readPortD(uint8_t addr)
618
{
619
    uint8_t result;
620
    DATADIR(0x00); //set I/O on read mode
621
    ADDRWRITE(addr); //search uartn register
622
    CLRCSD; //enable uartD call
623
    setWait(3);
624
    CLRRD; //enable read mode
625
    setWait(3);
626
    result = PORTD.IN; //set I/O on read mode
627
    setWait(3);
628
    SETRD; //disable read mode
629
    setWait(3);
630
    SETCSD; //hang up uartD call
631
    return result;
632
}
633
634
635
636
637
638
///////////////////////////////////////////
639
//Miscellaneous functions
640
641
void setWait(uint16_t cnt)
642
{
643
    uint16_t k = 0;
644
    while(k < cnt)
645
    {
646
        asm("nop");
647
        k++;
648
    }
649
}
650
651
652
653
654
655
#endif        /* XC_HEADER_TEMPLATE_H */